Desenvolvimento de uma plataforma experimental de emulação em tempo real de sistemas dinâmicos através de dispositivo FPGA

Abstract

One challenge that arises when studying dynamic systems is the eventual unfeasibility of experimentation using the real system. In this sense, the simulation of these systems becomes a convenient solution, however limited. Such limitation is due to the finite resources of the machine that performs the simulation and that is aggravated when the mathematical model used is detailed (high order) or requires a small time resolution along with a long simulation time. One way to alleviate the resource limitation problem is to use the HIL technique, where the behavior of the real system is reproduced by an embedded system. However this solution becomes impractical when the number of mathematical operations, in a given period of time, exceeds the capacity of the DSP or microcontroller used to emulate the system. Given this problem, an architecture was developed for an FPGA device that acts as a coprocessor, helping a DSP to perform a large number of mathematical operations in a short period of time, allowing the limits for emulation, utilized embedded systems, to be extended . This architecture is in charge of performing the matrix operations required by the state space representation, whereas the DSP is only responsible for generating the input signal from an analog signal and transforming the received digital signal into an analog signal.