Metodologia para a análise da eficiência e projeto de conversores na configuração cascata parcial destinados à aplicações de iluminação a Led

Abstract

This work presents a study on the efficiency of converters in partial cascade configuration, with high power factor and reduction in bus capacitance. The introductory part provides a contextualization of the problem involving the issue of converter efficiency, well as the main points to be observed in the design of a driver for LED lighting. Afterwards, a literature review bringing the main driver topologies, with an approach to the basic converter topologies in partial cascade configuration is shown. A method to calculate power losses of approximate way is proposed to be able to estimate efficiency in the chosen configuration, which employs non-idealities to better represent real operating conditions. Also, a methodology for determining the reprocessing factor and designing converters in partial cascade configuration is presented, using the proposed modeling, well as computational resources. The experimental results obtained are compared with the theoretical design values to show the efficiency approximation achieved. Finally, comparisons of experimental values are made with reference standards IEC 61000-3-2 Class C (limit of harmonics injected into the electrical network) and IEEE Std. 1789-2015 (recommendations for mitigating the effects of flicker).