Implementação de um inversor de 9 níveis monofásico controlado por dispositivo FPGA

Abstract

This work shows a study about the main topologies of multilevel voltage inverters and of different PWM (Pulse Width Modulation) modulation strategies for developing a cascaded H-bridge multilevel inverter with nine voltage levels, controlled by (Field Programmable Gate Array) for academic and educational use. To observe the inverter’s behavior for the four chosen modulation strategies were implemented different models (one for each modulation strategy) using Matlab Simulink. Each of the modulation strategies were simulated with the indices 0.25, 0.5, 0.75 and 1.Using the Quartus II software, the code written in VHDL language was implemented in the FPGA Altera Cyclone IV device contained in the DE0-nano board. In order to validate the PWM signals, the software ModelSim was used and then applied to the prototype boards developed in a previous Trabalho de Conclusão de Curso (TCC) on Universidade Tecnológica Federal do Paraná (UTFPR). The simulated and experimental results of the PWM signals for the different modulation and load indexes confirm that this work actually explores a viable and didactic alternative for the study of inverters with 9 with power up to 250 W.